This section provides you with an overview of different processor architectures, trying to explain the advantages and disadvantages of an architecture type over another.
Harvard vs Von Neumann:
The Harvard architecture has a physically separated storage and signal pathways for instructions and data. Therefore the characteristics of data and program memory and can differ: they may have different word width, timings, implementation technology, or memory address structure.
Instructions can be stored in read-only memory while data memory generally requires read-write memory. In some systems, there is much more instruction memory than data memory so instruction addresses are much wider than data addresses.
The separate storage means the program and data memories can have different bit depths. For example, the PIC24F architecture uses a 24-bit wide program space and a 16-bit wide data space. This allows a single instruction to contain a full-size data constant.
A microcontroller with a Harvard architecture can both read an instruction and perform a data memory access at the same time, even without a cache. A Harvard architecture microcontroller can thus be faster for a given circuit complexity because instruction fetches and data access do not contend for a single memory pathway.
The Modified Harvard architecture is very much like the Harvard architecture but provides a pathway between the instruction memory and the CPU that allows words from the instruction memory to be treated as read-only data. Constant data, particularly text strings or images can be accessed without first having to be copied into data memory, thus preserving more data memory for read/write variables. Special machine language instructions are provided to read data from the instruction memory. Since the program and data memories can have different bit depths, this constant data must be accessed in a way that preserves the alignment of information in both spaces.
Aside from normal execution, the PIC24F architecture provides two methods by which program space can be accessed during operation:
- using table instruction to access individual bytes or words anywhere in the program space;
- remapping a portion of the program space into the data space;
Most modern machines that are documented as Harvard Architecture are, in fact, Modified Harvard architecture
In contrast with the Harvard architecture, the Von Neumann architecture has a single storage structure to hold both instructions and data. The CPU can be either reading an instruction or reading/writing data from/to the memory because instructions and data use the same bus system.
A memory interface unit is responsible for arbitrating access to the memory space between reading instructions and passing data back and forth among the processor and its internal registers. It might seem that the memory interface is a bottle neck between the processor and the memory space. In many Von Neumann architectures this is not the case because the time required to execute an instruction is normally used to fetch the next instructions.
Modern high performance CPU chip designs incorporate aspects of both Harvard and von Neumann architecture. On-chip cache memory is divided into an instruction cache and a data cache. Harvard architecture is used as the CPU accesses the cache. In the case of a cache miss, however, the data is retrieved from the main memory, which is not divided into separate instruction and data sections. Thus, while Von Neumann architecture is presented to the programmer, the hardware implementation gains the efficiencies of the Harvard architecture.